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摘要:
In this paper we present the design and prototyping of an arithmetic processor based on reconfigurable technology, whose purpose is to determine in a parallel manner the quality of the solution in a radio network design optimization problem. This problem consists in the search for an optimal set of locations in which to place radio antennas in order to obtain the maximum possible coverage, for a given terrain and antenna characteristics. The original computational contribution of this work is to use programmable logic devices to avoid the high cost of computing the evolutionary algorithms required to tackle this optimization problem. This is achieved by means of reconfigurable processors working in parallel. On the basis of the results obtained from the prototype, it may be considered a parallel architecture capable of achieving a great acceleration in the calculations.
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篇名 Processor for Measuring Radio Network Design Quality
来源期刊 无线工程与技术(英文) 学科 医学
关键词 RADIO NETWORKS RECONFIGURABLE COMPUTING Optimization PARALLELISM
年,卷(期) wxgcyjsyw_2011,(3) 所属期刊栏目
研究方向 页码范围 204-211
页数 8页 分类号 R73
字数 语种
DOI
五维指标
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研究主题发展历程
节点文献
RADIO
NETWORKS
RECONFIGURABLE
COMPUTING
Optimization
PARALLELISM
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引文网络交叉学科
相关学者/机构
期刊影响力
无线工程与技术(英文)
季刊
2152-2294
武汉市江夏区汤逊湖北路38号光谷总部空间
出版文献量(篇)
154
总下载数(次)
0
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