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This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis (HLS). HLS tools convert algorithms designed in C into hardware modules. This approach is a practical choice for developing complex applications. Nevertheless, certain hardware considerations are required when writing C applications for HLS tools. Hence, in order to demonstrate the fundamental hardware design concepts, a case studyis presented. Fast Fourier Transform (FFT) implementation in ANSI C is examined in order to explore the important design issues such as concurrency, data recurrences and memory accesses that need to be resolved before generating the hardware using HLS tools. There are additional language constraints that need to be addressed including use of pointers, recursion and floating point types.
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篇名 System-on-Chip Design Using High-Level Synthesis Tools
来源期刊 电路与系统(英文) 学科 工学
关键词 System LEVEL DESIGN High LEVEL Synthesis Field PROGRAMMABLE Gate ARRAYS FOURIER Transform
年,卷(期) 2012,(1) 所属期刊栏目
研究方向 页码范围 1-9
页数 9页 分类号 TP39
字数 语种
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研究主题发展历程
节点文献
System
LEVEL
DESIGN
High
LEVEL
Synthesis
Field
PROGRAMMABLE
Gate
ARRAYS
FOURIER
Transform
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研究来源
研究分支
研究去脉
引文网络交叉学科
相关学者/机构
期刊影响力
电路与系统(英文)
月刊
2153-1285
武汉市江夏区汤逊湖北路38号光谷总部空间
出版文献量(篇)
286
总下载数(次)
0
总被引数(次)
0
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