Efficient Hardware/Software Implementation of LPC Algorithm in Speech Coding Applications

• 作者: Fatma Sayadi Mohamed Atri Rached Tourki Wajdi Elhamzi
• 来源期刊: 信号与信息处理(英文)
• 学科: 工学
• 关键词: Linear PREDICTIVE CODING System on PROGRAMMABLE Chip FPGA CO-DESIGN
• 年，卷（期）: 2012,（1）
• 页码范围: 122-129
• 页数: 8页
• 分类号: TP39

摘要

The LPC “Linear Predictive Coding” algorithm is a widely used technique for voice coder. In this paper we present different implementations of the LPC algorithm used in the majority of voice decoding standard. The windowing/autocorrelation bloc is implemented by three different versions on an FPGA Spartan 3. Allowing the possibility to integrate a Microblaze processor core a first solution consists of a pure software implementation of the LPC using this core RISC processor. Second solution is a pure hardware architecture implemented using VHDL based methodology starting from description until integration. Finally, the autocorrelation core is then proposed to be implemented using hardware/software (HW/SW) architecture with the existing processor. Each architecture performances are compared for different data lengths.