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摘要:
Nowadays, digital camera based remote controllers are widely used in people’s daily lives. It is known that the edge detection process plays an essential role in remote controlled applications. In this paper, a system verification platform of hardware optimization based on the edge detection is proposed. The Field-Programmable Gate Array (FPGA) validation is an important step in the Integrated Circuit (IC) design workflow. The Sobel edge detection algorithm is chosen and optimized through the FPGA verification platform. Hardware optimization techniques are used to create a high performance, low cost design. The Sobel edge detection operator is designed and mounted through the system Advanced High-performance Bus (AHB). Different FPGA boards are used for evaluation purposes. It is proved that with the proposed hardware optimization method, the hardware design of the Sobel edge detection operator can save 6% of on-chip resources for the Sobel core calculation and 42% for the whole frame calculation.
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篇名 System Verification of Hardware Optimization Based on Edge Detection
来源期刊 电路与系统(英文) 学科 工学
关键词 IC AHB FPGA HARDWARE Optimization SOBEL EDGE Detection
年,卷(期) 2013,(3) 所属期刊栏目
研究方向 页码范围 293-298
页数 6页 分类号 TP39
字数 语种
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研究主题发展历程
节点文献
IC
AHB
FPGA
HARDWARE
Optimization
SOBEL
EDGE
Detection
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研究分支
研究去脉
引文网络交叉学科
相关学者/机构
期刊影响力
电路与系统(英文)
月刊
2153-1285
武汉市江夏区汤逊湖北路38号光谷总部空间
出版文献量(篇)
286
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0
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0
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