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摘要:
In this paper, we present a solution to the ultra low voltage inverter by adding a keeper transistor in order to make the semi-floating-gate more stable and to reduce the current dissipation. Moreover, we also present a differential ULV inverter and elaborate on the reliability and fault tolerance of the gate. The differential ULV gate compared to both a former ULV gate and standard CMOS are given. The results are obtained through Monte-Carlo simulations.
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篇名 Reliability of High Speed Ultra Low Voltage Differential CMOS Logic
来源期刊 电路与系统(英文) 学科 医学
关键词 CMOS DIFFERENTIAL FLOATING-GATE Semi-Floating-Gate KEEPER RECHARGE ULTRA Low Voltage High Speed Monte-Carlo CADENCE STM 90 nm
年,卷(期) dlyxtyw_2015,(5) 所属期刊栏目
研究方向 页码范围 121-135
页数 15页 分类号 R73
字数 语种
DOI
五维指标
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研究主题发展历程
节点文献
CMOS
DIFFERENTIAL
FLOATING-GATE
Semi-Floating-Gate
KEEPER
RECHARGE
ULTRA
Low
Voltage
High
Speed
Monte-Carlo
CADENCE
STM
90
nm
研究起点
研究来源
研究分支
研究去脉
引文网络交叉学科
相关学者/机构
期刊影响力
电路与系统(英文)
月刊
2153-1285
武汉市江夏区汤逊湖北路38号光谷总部空间
出版文献量(篇)
286
总下载数(次)
0
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