Thermal resistance matrix representation of thermal effects and thermal design of microwave power HBTs with two-dimensional array layout

• 来源期刊: 中国物理B（英文版）
• 关键词: heterojunction bipolar transistors (HBTs) array thermal effects thermal resistance matrix thermal design
• 年，卷（期）: 2019,（9）
• 页码范围: 414-422
• 页数: 9页
• 语种: 英文
• DOI: 10.1088/1674-1056/ab3436

摘要

Based on the thermal network of the two-dimensional heterojunction bipolar transistors (HBTs) array,the thermal resistance matrix is presented,including the self-heating thermal resistance and thermal coupling resistance to describe the self-heating and thermal coupling effects,respectively.For HBT cells along the emitter length direction,the thermal coupling resistance is far smaller than the self-heating thermal resistance,and the peak junction temperature is mainly determined by the self-heating thermal resistance.However,the thermal coupling resistance is in the same order with the self-heating thermal resistance for HBT cells along the emitter width direction.Furthermore,the dependence of the thermal resistance matrix on cell spacing along the emitter length direction and cell spacing along the emitter width direction is also investigated,respectively.It is shown that the moderate increase of cell spacings along the emitter length direction and the emitter width direction could effectively lower the self-heating thermal resistance and thermal coupling resistance,and hence the peak junction temperature is decreased,which sheds light on adopting a two-dimensional non-uniform cell spacing layout to improve the uneven temperature distribution.By taking a 2 × 6 HBTs array for example,a twodimensional non-uniform cell spacing layout is designed,which can effectively lower the peak junction temperature and reduce the non-uniformity of the dissipated power.For the HBTs array with optimized layout,the high power-handling capability and thermal dissipation capability are kept when the bias voltage increases.