Improved 4H-SiC UMOSFET with super-junction shield region

• 作者: Pei Shen Ying Wang Xing-Ji Li Jian-Qun Yang Cheng-Hao Yu Fei Cao
• 来源期刊: 中国物理B（英文版）
• 年，卷（期）: 2021,（5）
• 所属期刊栏目: INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY
• 页码范围: 784-791
• 页数: 8页
• 语种: 英文
• DOI: 10.1088/1674-1056/abd740

摘要

This article investigates an improved 4H-SiC trench gate metal-oxide-semiconductor field-effect transistor (MOS-FET) (UMOSFET) fitted with a super-junction (S J) shielded region.The modified structure is composed of two n-type conductive pillars,three p-type conductive pillars,an oxide trench under the gate,and a light n-type current spreading layer(NCSL) under the p-body.The n-type conductive pillars and the light n-type current spreading layer provide two paths to and promote the diffusion of a transverse current in the epitaxial layer,thus improving the specific on-resistance (Ron,sp).There are three p-type pillars in the modified structure,with the p-type pillars on both sides playing the same role.The p-type conductive pillars relieve the electric field (E-field) in the comer of the trench bottom.Two-dimensional simula-tion (silvaco TCAD) indicates that Ron,sp of the modified structure,and breakdown voltage (VBR) are improved by 22.2％and 21.1％ respectively,while the maximum figure of merit (FOM =VB2R/Ron,sp) is improved by 79.0％.Furthermore,the improved structure achieves a light smaller low gate-to-drain charge (Qgd) and when compared with the conventional UMOSFET (conventional-UMOS),it displays great advantages for reducing the switching energy loss.These advantages are due to the fact that the p-type conductive pillars and n-type conductive pillars configured under the gate provide a substantial charge balance,which also enables the charge carriers to be extracted quickly.In the end,under the condition of the same total charge quantity,the simulation comparison of gate charge and OFF-state characteristics between Gauss-doped structure and uniform-doped structure shows that Gauss-doped structure increases the VBR of the device without degradation of dynamic performance.