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摘要:
Trusted computing allows attesting remote system’s trustworthiness based on the software stack whose integrity has been measured. However, attacker can corrupt system as well as measurement operation. As a result, nearly all integrity measurement mechanism suffers from the fact that what is measured may not be same as what is executed. To solve this problem, a novel integrity measurement called dynamic instruction trace measurement (DiT) is proposed. For DiT, processor’s instruction cache is modified to stores back instructions to memory. Consequently, it is designed as a assistance to existing integrity measurement by including dynamic instructions trace. We have simulated DiT in a full-fledged system emulator with level-1 cache modified. It can successfully update records at the moment the attestation is required. Overhead in terms of circuit area, power consumption, and access time, is less than 3% for most criterions. And system only introduces less than 2% performance overhead in average.
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篇名 Micro-Architecture Support for Integrity Measurement on Dynamic Instruction Trace
来源期刊 信息安全(英文) 学科 医学
关键词 INTEGRITY Measurement Remote Attestation Software VULNERABILITY TRUSTED Computing
年,卷(期) 2010,(1) 所属期刊栏目
研究方向 页码范围 1-10
页数 10页 分类号 R73
字数 语种
DOI
五维指标
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研究主题发展历程
节点文献
INTEGRITY
Measurement
Remote
Attestation
Software
VULNERABILITY
TRUSTED
Computing
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研究来源
研究分支
研究去脉
引文网络交叉学科
相关学者/机构
期刊影响力
信息安全(英文)
季刊
2153-1234
武汉市江夏区汤逊湖北路38号光谷总部空间
出版文献量(篇)
230
总下载数(次)
0
总被引数(次)
0
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