Reconfigurable design of deblocking filter for variable block sizes

• 作者: XIE Xiaoyan JI Shentao ZHU Yun YANG Kun XIA Xinyuan WANG Shuxin
• 来源期刊: 高技术通讯（英文版）
• 年，卷（期）: 2022,（1）
• 页码范围: 40-47
• 页数: 8页
• 语种: 英文
• DOI: 10.3772/j.issn.1006-6748.2022.01.005

摘要

Based on the flexible quadtree partition structure of coding tree units ( CTUs) , the deblocking filter ( DBF) in high efficiency video coding ( HEVC) consumes a lot of resources when implemen-ted by hardware. It is difficult to achieve flexible switching between different sizes of coding blocks. Aiming at this problem, a reconfigurable implementation of DBF is proposed. Based on the dynamic programmable reconfigurable video array processor ( DPRAP ) with context switch reconfiguration mechanism, the runtime flexible switching of two coding block sizes is realized. The experimental results show that the highest work-frequency reaches 151. 4 MHz. Compared with the dedicated hardware architecture scheme, the resource consumption can be reduced by 28. 1％ while realizing the dynamic switching between algorithms of two coding block sizes. Compared with the results of HM16. 0, by using a complete I-frame for testing, the average peak signal-to-noise ratio (PSNR) of the reconfigurable implementation proposed in this paper has increased by 3. 0508 dB, the coding quality has improved to a certain extent.