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摘要:
In this paper, four new hybrid digital circuit design techniques, namely, hybrid multi-threshold CMOS complete stack technique, hybrid multi-threshold CMOS partial stack technique, hybrid super cutoff complete stack technique and hybrid super cutoff partial stack technique, have been proposed to reduce the subthreshold leakage power dissipation in standby modes. Techniques available in literature are compared with our proposed hybrid circuit design techniques. Performance parameters such as subthreshold leakage power dissipation in active and standby modes, dynamic power dissipation and propagation delay, are compared using existing and proposed hybrid techniques for a two input AND gate. Reduction of subthreshold leakage power dissipation in standby mode is given more importance, in comparison with the other circuit design performance parameters. It is found that there is reduction in subthreshold leakage power dissipation in standby and active modes by 3.5× and 1.15× respectively using the proposed hybrid super cutoff complete stack technique as compared to the existing multi-threshold CMOS (MTCMOS) technique. Also a saving of 2.50× and 1.04× in subthreshold leakage power dissipation in standby and active modes respectively were observed using hybrid super cutoff complete stack technique as compared to the existing super cutoff CMOS (SCCMOS) technique. The proposed hybrid super cutoff stack technique proved to perform better in terms of subthreshold leakage power dissipation in standby mode in comparison with other techniques. Simulation results using Microwind EDA tool in 65 nm CMOS technology is provided in this paper.
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篇名 New Hybrid Digital Circuit Design Techniques for Reducing Subthreshold Leakage Power in Standby Mode
来源期刊 电路与系统(英文) 学科 医学
关键词 SUBTHRESHOLD LEAKAGE Power STANDBY MODE Active MODE PROPAGATION Delay
年,卷(期) 2013,(1) 所属期刊栏目
研究方向 页码范围 75-82
页数 8页 分类号 R73
字数 语种
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SUBTHRESHOLD
LEAKAGE
Power
STANDBY
MODE
Active
MODE
PROPAGATION
Delay
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期刊影响力
电路与系统(英文)
月刊
2153-1285
武汉市江夏区汤逊湖北路38号光谷总部空间
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286
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