Positive Bias Temperature Instability Degradation of Buried InGaAs Channel nMOSFETs with InGaP Barrier Layer and Al2O3 Dielectric

• 来源期刊: 中国物理快报（英文版）
• 关键词: @@
• 年，卷（期）: 2017,（5）
• 页码范围: 101-105
• 页数: 5页
• 语种: 英文
• DOI: 10.1088/0256-307X/34/5/057301

摘要

Positive bias temperature instability stress induced interface trap density in a buried InGaAs channel metaloxide-semiconductor field-effect transistor with a InGaP barrier layer and Al2O3 dielectric is investigated.Well behaved split C-V characteristics with small capacitance frequency dispersion are confirmed after the insertion of the InGaP barrier layer.The direct-current Id-Vg measurements show both degradations of positive gate voltage shift and sub-threshold swing in the sub-threshold region,and degradation of positive A Vg in the oncurrent region.The Id-Vg degradation during the positive bias temperature instability tests is mainly contributed by the generation of near interface acceptor traps under stress.Specifically,the stress induced acceptor traps contain both permanent and recoverable traps.Compared with surface channel InGaAs devices,stress induced recoverable donor traps are negligible in the buried channel ones.