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Based on 2-D device simulations and mixed-mode transient simulations, DC and transient discharge characteristics of a usual diode string utilizing a standard CMOS process, and a diode string utilizing a triple-well CMOS process, which can serve as an essential VDD-VSS clamp device for CMOS input ESD protection were compared. Transient discharge characteristics including peak voltages developed across gates oxides of transistors in input buffers, lattice heating inside ESD protection devices, and ratios of discharge current components at its peak inside the diode-string clamp were compared. DC standby current levels added per each input pad structure, which are the critical parameters determining usefulness of the devices, were also compared. We showed that the diode-string devices in comparison can serve successfully as a VDD-VSS clamp device for ESD protection by virtue of the dominant pnpn thyristor-related conduction mechanisms. Optimization of design parameters including anode-cathode contact spacing in each diode in the string, device width of the diode string, and number of diodes in the diode string was performed to present transient discharge and DC characteristics of some recommendable design examples, which can serve as a guideline in designing diode-string clamp devices.
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篇名 A Comparison Study of Diode-String ESD Clamps for CMOS Input Protection
来源期刊 电路与系统(英文) 学科 工学
关键词 ESD INPUT PROTECTION DIODE STRING Clamp CMOS
年,卷(期) 2019,(2) 所属期刊栏目
研究方向 页码范围 21-36
页数 16页 分类号 TN3
字数 语种
DOI
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ESD
INPUT
PROTECTION
DIODE
STRING
Clamp
CMOS
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期刊影响力
电路与系统(英文)
月刊
2153-1285
武汉市江夏区汤逊湖北路38号光谷总部空间
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286
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